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NXP Semiconductors /LPC5410x /I2C0 /INTENSET

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Interpret as INTENSET

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)MSTPENDINGEN 0 (RESERVED)RESERVED 0 (DISABLED)MSTARBLOSSEN 0 (RESERVED)RESERVED 0 (DISABLED)MSTSTSTPERREN 0 (RESERVED)RESERVED 0 (DISABLED)SLVPENDINGEN 0 (RESERVED)RESERVED 0 (DISABLED)SLVNOTSTREN 0 (RESERVED)RESERVED 0 (DISABLED)SLVDESELEN 0 (DISABLED)MONRDYEN 0 (DISABLED)MONOVEN 0 (RESERVED)RESERVED 0 (DISABLED)MONIDLEEN 0 (RESERVED)RESERVED 0 (DISABLED)EVENTTIMEOUTEN 0 (DISABLED)SCLTIMEOUTEN 0 (RESERVED)RESERVED

SLVNOTSTREN=DISABLED, SLVDESELEN=DISABLED, MSTSTSTPERREN=DISABLED, MONIDLEEN=DISABLED, MONRDYEN=DISABLED, MSTARBLOSSEN=DISABLED, EVENTTIMEOUTEN=DISABLED, MONOVEN=DISABLED, SLVPENDINGEN=DISABLED, MSTPENDINGEN=DISABLED, SCLTIMEOUTEN=DISABLED

Description

Interrupt Enable Set and read register.

Fields

MSTPENDINGEN

Master Pending interrupt Enable.

0 (DISABLED): Disabled. The MstPending interrupt is disabled.

1 (ENABLED): Enabled. The MstPending interrupt is enabled.
RESERVED

Reserved. Read value is undefined, only zero should be written.
MSTARBLOSSEN

Master Arbitration Loss interrupt Enable.

0 (DISABLED): Disabled. The MstArbLoss interrupt is disabled.

1 (ENABLED): Enabled. The MstArbLoss interrupt is enabled.
RESERVED

Reserved. Read value is undefined, only zero should be written.
MSTSTSTPERREN

Master Start/Stop Error interrupt Enable.

0 (DISABLED): Disabled. The MstStStpErr interrupt is disabled.

1 (ENABLED): Enabled. The MstStStpErr interrupt is enabled.
RESERVED

Reserved. Read value is undefined, only zero should be written.
SLVPENDINGEN

Slave Pending interrupt Enable.

0 (DISABLED): Disabled. The SlvPending interrupt is disabled.

1 (ENABLED): Enabled. The SlvPending interrupt is enabled.
RESERVED

Reserved. Read value is undefined, only zero should be written.
SLVNOTSTREN

Slave Not Stretching interrupt Enable.

0 (DISABLED): Disabled. The SlvNotStr interrupt is disabled.

1 (ENABLED): Enabled. The SlvNotStr interrupt is enabled.
RESERVED

Reserved. Read value is undefined, only zero should be written.
SLVDESELEN

Slave Deselect interrupt Enable.

0 (DISABLED): Disabled. The SlvDeSel interrupt is disabled.

1 (ENABLED): Enabled. The SlvDeSel interrupt is enabled.
MONRDYEN

Monitor data Ready interrupt Enable.

0 (DISABLED): Disabled. The MonRdy interrupt is disabled.

1 (ENABLED): Enabled. The MonRdy interrupt is enabled.
MONOVEN

Monitor Overrun interrupt Enable.

0 (DISABLED): Disabled. The MonOv interrupt is disabled.

1 (ENABLED): Enabled. The MonOv interrupt is enabled.
RESERVED

Reserved. Read value is undefined, only zero should be written.
MONIDLEEN

Monitor Idle interrupt Enable.

0 (DISABLED): Disabled. The MonIdle interrupt is disabled.

1 (ENABLED): Enabled. The MonIdle interrupt is enabled.
RESERVED

Reserved. Read value is undefined, only zero should be written.
EVENTTIMEOUTEN

Event time-out interrupt Enable.

0 (DISABLED): Disabled. The Event time-out interrupt is disabled.

1 (ENABLED): Enabled. The Event time-out interrupt is enabled.
SCLTIMEOUTEN

SCL time-out interrupt Enable.

0 (DISABLED): Disabled. The SCL time-out interrupt is disabled.

1 (ENABLED): Enabled. The SCL time-out interrupt is enabled.
RESERVED

Reserved. Read value is undefined, only zero should be written.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data